this post was submitted on 02 Apr 2025
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Is there any technical reason for some memory bus widths only showing up in cut-down GPUs? (lemmy.world)
submitted 1 year ago by flavonol@lemmy.world to c/hardware@lemmy.world
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There are some bus widths that are used in full discrete GPU dies and some that I've only ever seen in cut-down GPUs. Full-die GPU memory bus widths seem to always be:
64-bit × 2^n^ × (1 or 0.75)
where n is a whole number. Cut-down models can feature pretty much any multiple of 32 bits.

Examples:

  • 128-bit bus: common in entry-level GPUs (RTX 4060, RX 6600 XT)
  • 160-bit bus: occasionally shows up in cut-down designs (Arc B570)
  • 192-bit bus: common in midrange & entry-level GPUs (RTX 5070, Arc B580)
  • 256-bit bus: common in midrange GPUs (RX 9070 XT, RTX 3070 Ti)
  • 320-bit bus: occasionally shows up in cut-down designs (RX 7900 XT, RTX 3080)
  • 352-bit bus: Appeared in the RTX 2080 Ti, which was cut down
  • 384-bit bus: common in upper-midrange & high-end GPUs (RX 7900 XTX, RTX 4090)

Any insights into why this is? As a layperson, it seems like having a full die with perhaps a 160-bit bus for the entry level or a 224-bit bus for the midrange would at least occasionally make sense.

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[–] flavonol@lemmy.world 1 points 1 year ago

I understand the concept of fusing off or otherwise blocking defective die portions. What I am curious about is the apparent absence of, say, 320-bit bus designs being made which could be cut down as needed to 256-bit.