RISC-V

The RISC-V vector C intrinsics provide users interfaces in the C language level to directly leverage the RISC-V "V" extension (RISC-V "V" Vector Extension, n.d.) (also abbreviated as "RVV"), with assistance from the compiler in handling instruction scheduling and register allocation. The intrinsics also aim to free users from responsibility of maintaining the correct configuration settings for the vector instruction executions. This document uses the term "RVV" as an abbreviation for the RISC-V "V" extension. This document uses the term "the RVV specification" to indicate the RISC-V "V" extension specification.

Earlier this month Canonical announced Ubuntu Linux support for the Orange Pi RV2 as a low-cost RISC-V developer board. The Orange Pi RV2 with eight RISC-V cores and 8GB of RAM costs just around $64 USD. The price point and specs were interesting that I ordered one and have been running performance benchmarks on it since for seeing how capable this is as finally an interesting, low-cost and readily available RISC-V board.

direct YT link: https://www.youtube.com/watch?v=9s8hPmCZ0mk

Has anyone used such a system as a "daily driver"?

What do you need to do in order to boot a normal distro such as Debian or such? How does it stand from the perspective of user/software freedom? What sorts of proprietary sh#ts does it need to be usable? What sorts of compromises that may not be obvious at first glance?

Also how does it "feel" day to day?

The SG2044 is the successor of the SG2042, with the same 64 core count but 8 LPDDR5X channels, 80 PCIe gen 5 lanes, and improved clock speed.

From what I can find in articles and reddit it supposed to have a launch date of 2024, but its not available on the sophon website or any other.

I am starting to worry it has been silently canceled, so does anyone know what happend to it? And if it's still coming what the projected release date is now?

Merged on Friday for the nearly-over Linux 6.15 merge window were the RISC-V CPU architecture updates for this next kernel release.

RISC-V with Linux 6.15 brings build improvements thanks to a re-architecting of the Kconfig build system options around RISC-V for selecting sub-architecture features.

For the Linux 6.15 kernel with RISC-V there is also support for building relocatable non-MMU kernels, support for huge PFNMAPS to improve TLB utilization, support for runtime constants, new RISC-V instructions supported, and a variety of fixes.

cross-posted from: https://lemmy.zip/post/35528933

China is doubling down on the RISC-V architecture.

cross-posted from: https://lemmy.ml/post/28025426

The European Chips Act has set ambitious goals and its implementation is a significant pan-european effort. From an academic perspective, last year we published an open letter emphasizing the critical importance of open-source EDA for academia in Europe. We were excited and grateful to see that this initiative triggered the definition of a European roadmap in this area, and a matching Chips JU call for project funding. We believe that the projects funded by this call will have a significant impact. Moreover, we already see rising interest from many EU stakeholders, with increasing investments into open-source chip design, especially in open source IP development (e.g. RISC-V cores), and open source EDA tools.

One additional critical barrier remains toward the end-goal of building real open-source chips, especially for prototyping and education: namely, streamlining the access to open source chip production facilities (foundries) is essential. Programs like ChipIgnite, Tiny Tapeout and IHP’s open source program have become “guiding stars” that demonstrate that everyone with a computer can build chips. We believe that having low-cost, regular and easy access to chip production is critical to create excitement and build up expertise, widening the pool of chip designers with tape-out experience: a true silicon democratization and a further de-mystification of chip design.

The CPU seems similar to the spacemit k1, but apparently there is no information about it. Too cheapt for rvv extensions?

In Europe 8GB version for less than 60€

cross-posted from: https://lemmy.world/post/26398664

cross-posted from: https://lemmy.world/post/25906238

cross-posted from: https://lemmy.ml/post/25900262

An educational implementation of a parallel processor in system-verilog.

The Intro to GPU Architecture chapter is a short write-up on the theoretical basics needed to understand the GPU implemented in this repository.

We’re happy to share that DeepComputing’s DC-ROMA RISC-V Mainboard for Framework Laptop 13 is now in stock and shipping in the Framework Marketplace. This is very much a developer-focused board to help accelerate maturing the software ecosystem around RISC-V, so we recommend waiting for future RISC-V products if you’re looking for a consumer-ready experience. We shared more detail on the Mainboard in an earlier blog post and video, but as a quick summary, this is powered by a StarFive JH7110 processor that uses the open source RISC-V ISA. The team at DeepComputing designed it to drop directly into a Framework Laptop 13 chassis or Cooler Master Mainboard Case.