this post was submitted on 22 Nov 2025
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RISC-V

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RISC-V (pronounced “risk-five”) is a license-free, modular, extensible instruction set architecture (ISA).

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RISC-V Testing Lapse Resulted In Wrong MIPS RISC-V Vendor ID Landing In Linux 6.18 (www.phoronix.com)
submitted 1 day ago by cm0002@infosec.pub to c/riscv@programming.dev
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An interesting anecdote from this week's batch of RISC-V fixes for the Linux 6.18 kernel exposed that the MIPS RISC-V/JEDEC vendor ID was wrong for code merged at the start of the kernel cycle. The testing hadn't caught it either as the QEMU emulation also ended up inadvertently using the wrong vendor ID too.

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